By Jason Cong, Sachin Sapatnekar, Yuan Xie
This booklet offers the reader with a whole figuring out of why 3 dimensional IC layout is a promising technique to proceed functionality scaling, the prospective how you can do 3D integration (fabrication), the EDA demanding situations and ideas to facilitate designers to do 3D IC layout, the architectural advantages of utilizing 3D expertise, and the layout matters on the structure point. The paintings covers the heritage on 3D integration, fabrication techniques for 3D ICs, EDA flows and algorithms for 3D layout, structure point layout recommendations for 3D microarchitecture. The ebook comprises an creation at the heritage of 3D IC, a motivation that explains why the 3D IC is critical and the way it is going to development, 3D procedure (fabrication) suggestions, 3D EDA algorithms and instruments (physical point and architectural point tools), 3D microarchitecture, together with 3D FPGA, 3D unmarried core/multi center processors, 3D Network-onchip designs.
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Extra resources for Three-Dimensional Integrated Circuit Design: EDA, Design and Microarchitectures (Integrated Circuits and Systems)
Five. five. three Window-Based Stacking/Folding Transformation Scheme As said above, LST achieves the best wirelength aid on the price of a big volume of TS vias, whereas folding ends up in a way smaller TS through quantity yet longer wirelength and doubtless excessive through density alongside the folding strains. a terrific 3D placement must have brief wirelength with TS through density pleasant what the vertical interconnection know-how can help. additionally, we want even TS through density for routability cause. accordingly, we recommend a window-based stacking/folding procedure for greater TS through density keep an eye on. during this approach, 2nd placement is first divided into N × N home windows. Then the stacking or folding transformation is utilized in each window. each one window can use varied stacking/folding orders. determine five. 10 exhibits the instances for N = 2. The circuit is split into 2×2 home windows (shown with strong lines). each one window is back divided into 4 squares(shown with dotted lines). The quantity in each one sq. shows the layer variety of that sq. after stacking/folding. The four-layer placements of every window are packed to shape the ultimate 3D placement. Wirelength relief is because of the subsequent purposes: the wirelength of the nets contained in the similar sq. is preserved; the wirelength of nets contained in the comparable window is probably decreased because of the impression of stacking/folding; and the wirelength of nets that go different home windows is lowered. as a result the general wirelength caliber is more advantageous. in the meantime, the TS vias are allotted frivolously between various home windows and will be lowered by way of determining right layer assignments. TS vias are brought by means of the nets that move the bounds among neighboring squares with diverse layer numbers, and we name this boundary among neighboring squares a transition. Fewer transitions bring about fewer TS vias. Intra-window transitions can't be decreased simply because we have to distribute intra-window squares to assorted layers, so we concentrate on lowering inter-window transitions. because the sequential layer project in Fig. five. 10a Fig. five. 10 2×2 home windows with diverse layer assignments three four three four 2 1 2 1 three four three four 2 1 2 1 (a) sequential three four four three 2 1 1 2 2 1 1 2 three four four three (b) symmetric 5 Thermal-Aware 3D Placement one hundred twenty five creates plenty of transitions, we use one other layer project as in Fig. five. 10b, referred to as symmetric project, to minimize the quantity of inter-window transitions to 0. So this accretion project generates the smallest TS through quantity, whereas the wirelength is identical. The wirelength as opposed to TS through quantity trade-offs will be managed via the variety of home windows. five. 6 Legalization and exact Placement thoughts a last position for any mobile isn't really wanted within the worldwide placement degree. The legalization is accountable for removal the rest overlaps among cells, and the particular placement plays additional refinement for the situation caliber. Coarse legalization (Section five. 6. 1) bridges the distance among worldwide placement and exact placement. Even for the discrete partitioning-based innovations mentioned in part five.